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[27900] Artykuł:

Synthesis of power aware adaptive schedulers for embedded systems using developmental genetic programming

Czasopismo: Proceedings of the 2015 Federated Conference on Computer Science and Information Systems   Tom: 5, Strony: 449-459
ISSN:  2300-5963
ISBN:  978-8-3608-1066-8
Wydawca:  IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Opublikowano: 2015
Seria wydawnicza:  ACSIS-Annals of Computer Science and Information Systems
 
  Autorzy / Redaktorzy / Twórcy
Imię i nazwisko Wydział Katedra Procent
udziału
Liczba
punktów
Roman Stanisław Deniziak orcid logoWEAiIKatedra Systemów Informatycznych *507.50  
Leszek Ciopiński orcid logoWEAiIKatedra Systemów Informatycznych *507.50  

Grupa MNiSW:  Materiały z konferencji międzynarodowej (zarejestrowane w Web of Science)
Punkty MNiSW: 15
Klasyfikacja Web of Science: Proceedings Paper


Pełny tekstPełny tekst     DOI LogoDOI     Web of Science Logo Web of Science    


Abstract:

In this paper we present a method of synthesis of
adaptive schedulers for real-time embedded systems. We assume
that the system is implemented using multi-core embedded
processor with low-power processing capabilities. First, the devel-
opmental genetic programming is used to generate the scheduler
and the initial schedule. Then, during the system execution the
scheduler modifies the schedule whenever execution time of the
recently finished task occurred shorter or longer than expected.
The goal of rescheduling is to minimize the power consumption
while all time constraints will be satisfied. We present real-life
example as well as some experimental results showing advantages
of our method.



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