Abstract: The paper deals with method of designing of a digital equalizer for analog signal path with ADC and low-order low-pass filter on its front. The correction effect is achieved through use of the IIR digital filters, designed in equalization purposes of the magnitude frequency response. The application of an equalizer allows to gain high attenuation in cutoff band and expand the signal bandwidth. Simultaneously it allows using low order anti-aliasing analog filter on ADC front. The equalizer can operate as a separate device or could be build-in signal processor (or in any other signal processing ASIC). In the first case it could be prepared as a module, implemented in FPGA device.
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